23 dependents
| Package | Description | Downloads/month |
|---|---|---|
| A modern hardware definition language and toolchain based on Python | 46K | |
| microcontroller-based FPGA / JTAG programmer | 32K | |
| A WASM based simulation backend for Torii | 3K | |
| Amaranth HDL framework for monitoring, hacking, and developing USB devices | 3K | |
| Sequential Logic | 2K | |
| Yet another simulator for Microchip AVR microcontrollers | 883 | |
| Cross EDA Abstraction and Automation | 880 | |
| An interactive digital logic simulator with verilog support (Yosys) | 868 | |
| Discrete Event Simulation Modeling framework for SimPy | 836 | |
| Torii hardware definition language | 756 | |
| MCP server for AI-driven waveform analysis via wavekit | 691 | |
| micro version of cocotb, to run on microcontrollers or desktop to get hardware i... | 461 | |
| Observatory, a cross-platform matplotlib-based observability tool | 412 | |
| A USB multitool + Torii HDL framework for monitoring, hacking, and developing US... | 298 | |
| a Python-based Hardware Generation Language | 180 | |
| 172 | ||
| An Integrated Logic Analyzer for Torii | 100 | |
| Output bits and decoder annotations to wavedrom format | 99 | |
| Output to value change dump (.vcd) | 92 | |
| Host tools for Luminary FPGA debug controllers | 90 | |
| Output to value change dump (.vcd) | 73 | |
| A configurable and approachable tool for FPGA debugging and rapid prototyping. | 72 | |
| A modular tool for reverse engineering register accesses from digital waveforms | 65 |
