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unicorn

Unicorn CPU emulator framework (ARM, AArch64, M68K, Mips, Sparc, PowerPC, RiscV, S390x, TriCore, X86)

pnnx

ncnn is a high-performance neural network inference framework optimized for the mobile platform

ncnn

ncnn is a high-performance neural network inference framework optimized for the mobile platform

microprobe-target-riscv

Microprobe: Microbenchmark generation framework: Target definitions for RISCV

microprobe-core

Microprobe: Microbenchmark generation framework: Main package

microprobe-all

Microprobe: Microbenchmark generation framework: A modular and extensible framework to generate microbenchmarks

microprobe-doc

Microprobe: Microbenchmark generation framework: Documentation

tinyfive

TinyFive is a lightweight RISC-V emulator and assembler written in Python with neural network examples

riscv-assembler

RISC-V Assembly code assembler package for Python.

rvnewop

A RISC-V new instruction discovery tool [Work in Progress]

udbserver

Unicorn Emulator Debug Server - Written in Rust, with bindings for C, Go, Java and Python

microprobe-target-power

Microprobe: Microbenchmark generation framework

seal5

Seal5 - Semi-automated LLVM Support for RISC-V Extensions including Autovectorization

rvgen

Pure-Python RISC-V instruction generator with built-in functional coverage, auto-regression, and CI-ready dashboards.

peakrdl-halcpp

C++ 17 Hardware abstraction layer generator from systemrdl

shl-python

An optimized neural network operator library for chips base on Xuantie CPU.