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fasm

FPGA Assembly (FASM) Parser and Generator

sphinxcontrib-verilog-diagrams

Sphinx Extension which generates various types of diagrams from Verilog code.

sdf-timing

Python library for working Standard Delay Format (SDF) Timing Annotation files.

sphinxcontrib-hdl-diagrams

Generate diagrams from HDL in Sphinx.

uxsdcxx

generate PugiXML reader/writer from XSD schema