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systemrdl-compiler

SystemRDL 2.0 language compiler front-end

peakrdl-regblock

Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.

peakrdl-rust

Generate Rust code from SystemRDL for accessing control/status registers.

simplhdl

Simulation and implementation flow for hardware description languages

pysystemrdlmodel

An abstract language model of SystemRDL written in Python.

peakrdl-halcpp

C++ 17 Hardware abstraction layer generator from systemrdl

peakrdl-beam

Generate Erlang or Elixir modules from a SystemRDL register model

pyralgen

Python based UVM-RAL generator